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Alif Semiconductor /AE101F4071542LH_CM55_HE_View /LPUART /UART_SFE

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Interpret as UART_SFE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)SFE

SFE=Val_0x0

Description

Shadow FIFO Enable Register

Fields

SFE

This is a shadow bit for the UART_FCR[FIFOE] bit. It is used to remove the burden of having to store the previously written value to the UART_FCR in memory and having to mask this value so that only the FIFO enable bit gets updated. This enables/disables the Tx FIFOs. If this bit is set to 0 after being enabled then both the Tx and Rx controller portion of FIFOs will be reset.

0 (Val_0x0): FIFOs are disabled

1 (Val_0x1): FIFOs are enabled

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data